TMS370C16 microcontroller research report

   TMS370C16 microcontroller core is part of the PRISM module library with its modular fabrication processes, to integrate analog and digital functions on a single chip. The process technologies currently include VLSI CMOS, nonvolatile memories (EPROM\EEPROM), lateral DMOS, high-voltage analog CMOS and high-density analog CMOS.

   The 16-bit TMS370C16 CPU is part of the cMCU370 family of microcontrollers devices. The part of this article include short results of experimental research on TMS370C16B5A; TMS370C16B57; TMS370C16B58 microcontrollers “COBRA” (OTP – EPROM 100PQFP package).

Programmer's model

The 16-bit CPU module consist of the following parts:

Figure 1 ( Register file structure )

The PC not included in the register file, because the PC
uses the word-addressed data type, the instruction and the instruction
extension words can be located at any even address in the entire 128K
byte memory address space of the TMS370C16

The address space:

   The Program Counter holds the 16 most significant bits of the 17-bit memory address space. All instructions are word aligned thus the least significant address bit (bit 0) of all program references always containes the value 0. The PC to address bus transition is shown in Figure 1

Figure 2 ( Program Counter to Address Bus Transition )

Memory types:

Interrupts:

Power modes:

Addressing mode summary

Implied	Operand is not required. Instruction operation is implied in the mnemonic.
PC Relative	Operation is relative to the PC contents.
Memory Direct	Operation is on specific memory address.
Immediate	Operate on a value specified in the operand.
Register Direct	Operate on a value in a register.
Register Indirect ↓	Operate on a value at an address in a register.
• No Displacement	Register contents = effective address (includes both predecrement and postincrement modes)
• With Displacement	Offset + register contents = effective address (includes extra indirection with CALL and JMP instructions)

System configuration

   The system module controls device operation such as clock source, stack location, reset, interrupts, I/O. The actual number of external interrupts, I/O pins is device specific and it can be difference for family devices. The system block configuration see Figure 3. Certain device status information is also contained within the system module.

Figure 3 ( The System Module Block Diagram )

System reset operation

   Seven actions can cause a system reset to device. Six of these are internally generated, while the rest pin interrupt is controlled externally.

Reset sources:

Reset pin:

Figure 4 ( Reset State Diagram - Normal Mode )

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